The present invention relates to a system for digitizing and processing video signals, as well as to a television signal receiver comprising such a system.
When, for example in a television signal transmission system, a line processing sequence is required, which consequently implies storing the original video signal in a store and, after processing, regaining the video signal with a delay of one or more line periods, the system must incorporate a sampling clock. In order to avoid a shift of the sampling action from line to line, which would cause horizontal fringes to appear in the television picture, this clock may be formed by a phase-locked loop which, as shown in FIG. 1 and described in detail hereinafter, includes an oscillator whose frequency is controlled by a d.c. voltage, a frequency divider adjusting said frequency to the line frequency, a phase comparator whose output supplies the d.c. voltage which controls the oscillator frequency (to ensure a phase-equality between the line synchronizing signals and the signals obtained by means of frequency division from the oscillator signal) and by a filter which, means of integration, prevents sudden changes from occurring.
The stability of the oscillator is then, however, usually insufficient between two consecutive comparisons to result in a faultless display of a television picture. When, for example, the composite video signal is digitized and processed, the instantaneous instabilities of the oscillator are shown in the signal to be displayed after processing, as phase transients which are displayed after demodulation as very annoying smears of 1 to 2 cm in the picture. Moreover, the sensitivity to interferences from the power supply is high. The elimination of these interferences is difficult and too costly for large-scale manufacture.